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GMS to present at IEEE MDTS 2024 in Albany

At the IEEE Microelectronics Design and Test Symposium taking place in Albany, NY, May 13 – 15, 2024, Green Mountain Semiconductor will present a paper co-authored with its customer Non-Von LLC entitled "Co-design of a Novel Highly Parallel Multi-Thousand Multi-Chip Neural Network Accelerator in 28nm CMOS".

A prototype AI processor with over 3000 cores for image and pattern recognition at the edge will be presented. The architecture showcases a successful co-development effort negotiating between software/algorithm based conceptual ideas and VLSI design realities. A digital twin of the proposed hardware was developed early on to ensure that the technical implementation met the needs of the software team, and was maintained throughout the project.

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